1. Field of the Invention
This invention generally relates to a semiconductor device, and, in particular, to a semiconductor memory device. More specifically, the present invention relates to a voltage level converting circuit for converting the voltage level of an input signal to a desired level, which is particularly suited for use in semiconductor memory devices. Still more specifically, the present invention relates to a semiconductor level converting circuit including Complementary MOS devices.
2. Description of the Prior Art
In Erasable Programmable Read Only Memory (PROM ) devices, three voltages V.sub.IL, V.sub.IH and V.sub.PP different in level are selectively applied to one of the connection pins, which is normally indicated by the OE/V.sub.PP pin, because of the limited number of connection pins. During program and program inhibit modes, voltage V.sub.PP is applied; whereas, during read, stand-by, verify and output inhibit modes, either one of voltages V.sub.IL and V.sub.IH is selectively applied. In such EPROMs, provision is usually made of a voltage level converting circuit in order to allow to output V.sub.PP with a minimum voltage drop when the voltage V.sub.PP is applied and to convert the output voltage level to 0 volt when voltage V.sub.IL or V.sub.IH is applied so as to maintain the power dissipation as small as possible. However, as the density of memory devices increases due to recent developments in semiconductor technology, it is desired to still decrease the level of power dissipation.